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    Add as FriendIntroduction To Computer Architecture Lecture 1

    by: Rogers

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    1 : CpE 442 Introduction To Computer Architecture Lecture 1 Instructor: H. H. Ammar These slides are based on the lecture slides provided with the course text book specified in the course syllabus
    2 : Overview of Today’s Lecture Course Overview Levels of Representation Levels of Organization
    3 : Course Overview Computer Design Instruction Set Deign ° Machine Language ° Compiler View ° "Computer Architecture" ° "Instruction Set Processor" "Building Architect" Computer Hardware Design ° Machine Implementation ° Logic Designer's View ° "Processor Architecture" ° "Computer Organization” “Construction Engineer”
    4 : Instruction Set Architecture . . . the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. Amdahl, and Brooks, 1964 SOFTWARE -- Organization of Programmable Storage -- Data Types & Data Structures: Encodings & Representations -- Instruction Formats -- Instruction (or Operation Code) Set -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions
    5 : Organization Logic Designer's View ISA Level FUs & Interconnect -- Capabilities & Performance Characteristics of Principal Functional Units (e.g., Registers, ALU, Shifters, Logic Units, etc. -- Ways in which these components are interconnected -- nature of information flows between components -- logic and means by which such information flow is controlled. Choreography of FUs to realize the ISA Register Transfer Level Description
    6 : What is "Computer Architecture” ? A system concept integrating software, hardware, and firmware to specify the design of computing systems ° Co-ordination of levels of abstraction I/O system Instr. Set Proc. Compiler Operating System Application Digital Design Circuit Design ° Under a set of rapidly changing Forces Instruction Set Architecture
    7 : Forces on Computer Architecture Computer Architecture Technology Programming Languages Operating Systems History Applications
    8 : Technology: Microprocessor Logic Density Memory: 4x every 3 years
    9 : Performance Trends Microprocessors Minicomputers Mainframes Supercomputers
    10 : CPU and LAN Performance Year Relative Performance 1000 100 10 1 1980 1985 1990 1995 2000 100 Mb FDDI 10 Mb 1 Gb ATM MIPS M/120 DEC Alpha CPU LAN
    11 : Levels of Representation High Level Language Program Assembly Language Program Machine Language Program Control Signal Spec Compiler Assembler Machine Interpretation temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111
    12 : MIPS R3000 Instruction Set Architecture Instruction Categories Load/Store Computational Jump and Branch Floating Point coprocessor Memory Management Special R0 - R31 PC HI LO OP OP OP rs rt rd sa funct rs rt immediate target Instruction Format
    13 : Measurement and Evaluation Architecture is an iterative process -- searching the space of possible designs -- at all levels of computer systems Creativity Good Ideas Mediocre Ideas Bad Ideas Cost / Performance Analysis
    14 : Course Overview (cont) Computer Design Instruction Set Deign ° Machine Language ° Compiler View ° "Computer Architecture" ° "Instruction Set Processor" "Building Architect" Computer Hardware Design ° Machine Implementation\ ° Logic Designer's View ° "Processor Architecture" ° "Computer Organization" “Construction Engineer” Few people design computers! Very few design instruction sets! Many people design computer components. Very many people are concerned with computer functions, in detail.
    15 : So what's in it for me? In-depth understanding of the inner-workings of Computing Systems, their evolution, and trade-offs present at the hardware/software boundary. Insight into fast/slow operations that are easy/hard to implementation hardware Understanding of the design process in the context of a large complex Computing Systems design. Functional Spec --> Control & Datapath --> Physical implementation
    16 : Example Architecture: The SPARCstation 20 Memory Controller Memory Bus Memory SIMMs MSBI MBus SEC MACIO Disk Tape SCSI Bus SBus Keyboard & Mouse Floppy Disk External Bus
    17 : Levels of Organization SPARCstation 20 SPARC Processor Computer Control Datapath Memory Devices Input Output
    18 : The Underlying Network Memory Controller Memory Bus MSBI Processor Bus: MBus SEC MACIO Standard I/O Bus: Sun’s High Speed I/O Bus: SBus Low Speed I/O Bus: External Bus SCSI Bus
    19 : Processor and Caches MBus MBus Module External Cache Datapath Registers Internal Cache Control SuperSPARC Processor
    20 : Memory Memory Controller Memory Bus DRAM SIMM
    21 : Input and Output (I/O) Devices SEC MACIO Disk Tape SCSI Bus SBus Keyboard & Mouse Floppy Disk External Bus SCSI Bus: Standard I/O Devices SBus: High Speed I/O Devices External Bus: Low Speed I/O Device
    22 : Standard I/O Devices Disk Tape SCSI Bus SCSI = Small Computer Systems Interface A standard interface (IBM, Apple, HP, Sun ... etc.) Computers and I/O devices communicate with each other The hard disk is one I/O device resides on the SCSI Bus
    23 : High Speed I/O Devices SBus SBus is SUN’s own high speed I/O bus SS20 has four SBus slots where we can plug in I/O devices Example: graphics accelerator, video adaptor, ... etc. High speed and low speed are relative terms
    24 : Slow Speed I/O Devices Keyboard & Mouse Floppy Disk External Bus The are only four SBus slots in SS20--”seats” are expensive The speed of some I/O devices is limited by human reaction time--very very slow by computer standard Examples: Keyboard and mouse No reason to use up one of the expensive SBus slot
    25 : 1. The HASE Architecture Simulation Environment 2. The New Compiler Technology simulation (shown in class) 3. MIPS Assembly Language Simulators a. SPIM A MIPS32 Simulator http://pages.cs.wisc.edu/~larus/spim.html b. MARS (MIPS Assembler and Runtime Simulator) http://courses.missouristate.edu/kenvollmar/mars/ Computer Architecture Simulation Tools
    26 : Summary All computers consist of five components Processor: (1) datapath and (2) control (3) Memory (4) Input devices and (5) Output devices Not all “memory” are created equally Cache: fast (expensive) memory are placed closer to the processor Main memory: less expensive memory--we can have more Input and output (I/O) devices has the messiest organization Wide range of speed: graphics vs. keyboard Wide range of requirements: speed, standard, cost ... etc. Least amount of research (so far)
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